AVR JTAG ICE

The JTAG ICE is a complete tool for On-chip Debugging on all AVR 8-bit microcontrollers with the JTAG interface. The JTAG interface is a 4-wire Test Access Port (TAP) controller that is compliant with the IEEE 1149.1 standard. The IEEE standard was developed to enable a standard way to efficiently test circuit board connectivity (Boundary Scan). Atmel AVR devices have extended this functionality to include full Programming and On-chip Debugging support. The JTAG ICE uses the standard JTAG interface to enable the user to do real-time emulation of the microcontroller while it is running in the target system. The AVR On-chip Debug protocol (AVROCD) gives the user complete control of the internal resources of the AVR microcontroller. The JTAG ICE provides emulation capability at a fraction of the cost of traditional emulators.

Technical Specification

• Supports debugging of all AVR and AVR32 devices with OCD
• Supports programming of all AVR and AVR32 devices with OCD
• On-Chip Debugging: Run, Single step, Breakpoints, etc.
• Supports Assembler and HLL Source Level Debugging
• Programming Interface to flash, eeprom, fuses and lockbits (not debugWIRE)
• USB 1.1 and RS232 Interface to PC for Programming and Control
• JTAG, PDI, debugWIRE Interface to target board
• Regulated Power Supply for 9-15V DC Power
• Can be powered from the USB bus
• Target operating voltage range of 2.1V to 5.5V